The present invention relates to an integrated circuit having a common input terminal for a plurality of circuit blocks receiving signals via the common input terminal.
The integration density of integrated circuits has been increasing and the number of elements and functional circuits fabricated in the same integrated circuit chip have become large. On the other hand, the number of external terminals provided in one integrated circuit chip has been limited in view of topographical layout of the chip and yields of production. Under such circumstance, it has been proposed that one external terminal is commonly utilized by two or more circuit blocks included in the same chip. For example, in the multi-strobe type dynamic memory in which row address signals and column signals are taken through the same set of address terminals in response to a row address strobe (RAS) and a column address strobe (CAS), respectively, the column address strobe is also used to control refresh operation, data outputting operation and serial column selecting operation. In this case, the column address strobe is applied to the circuit blocks for achieving the above operations. Therefore, the external terminal receiving the column address signal is directly connected to the inputs of the respective circuit blocks.
However, according to the above technique, since the common external terminal is directly connected to a plurality of circuit blocks, the capacitance associated to the common external terminal is inevitably very large, resulting in low speed operations. Moreover, each of the circuit blocks is provided with a special control circuit which prevents the circuit block from being affected by unnecessary input through the common external terminal after conducting it relevant function. This has made the respective circuit blocks complicated.